Hello Rick,
Thank you for swooping in to help us out. And sorry about the mixup in posts.
As a response to the points raised by you,
1) We have checked for PVDD undervoltage. We don't notice any PVDD under voltage on board.
2) We don't see VDD_SPI drop.
3) Fault is asserted. And we see repetitive toggle on both nFault and nOctw. Their assertions seem to be happening alternately.
Also we did the following:
1) Checked for Gate drive outputs in the 6PWM mode and found that the readback value did not change over repititive readbacks. So we proceeded to test for gate drive outputs for that configuration and noticed the following:
a. At the Gate of the High side MOSFET, we don’t see the expected output corresponding to the PWM inputs provided. The pulses of output amplitude, at around 3V is seen, without any match in the PWM frequency or duty cycle.
b. We notice no gate drive output at the Low-side MOSFET. It is continuously LOW.
c. We see that nFault is toggling with only short periods HIGH. nOctw is continuously HIGH.
2) Checked for PWM without SPI configuration, with default settings.
a. We provide 6 PWM inputs to the DRV. (Considering the default configuration)
b. We notice Improper pulse outputs ( not expected PWMs, improper frequency, improper duty cycles) the amplitude of the pulses on the gate of the Top side MOSFET was around 10 V and the bottom side gate, pulses were of around 5 V amplitude.
c. We see that the nFault is toggling, it stays LOW for most of the time. nOCTW is continuously HiGH.
What could be the problem we see? Please provide your opinions.
Regards.