Hi Rick,
I changed the OCP_MODE to OC latch shut down mode but the behaviour in case of an error remains exaclty the same. I recorded the voltages prior to the fault anyway:
I changed the duty cycle of half bridge 1 from -0.5 (0%) to 0.497 (99.7%) and measured the Uds voltage of the low MOSFET (blue), the DC link voltage (green) and the OCTWn line (red). Apparently, the duty cycle is adjusted properly for a couple of cycles, but then for some reason the level of the OCTWn line changes within some cycle. Here is a zoomed in view of the first fault:
Could this be related to the bootstrap circuit?
Regards,
Oliver