RE: DRV8313: About minimum value of UVLO and behavior of V3P3 regulator

Hi Kanemaru-san,

I understand that “V3P3 regulator” is enabled if VM is more than the VULO_min.

So, my understanding is as follows.

-V3P3 regulator is disabled if UVLO_min ＞ VM

-V3P3 regulator is enabled if UVLO_min ≦ VM

Is my understanding correct?

----- V3P3 trails VM by approximately 2.0V as VM ramps. For example at
VM V3P3
1 V .26V
2V .28V
3V .97V
4V 1.66V
5V 2.48V
6V 3.26V
7V 3.35V