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RE: DRV3201-Q1: Table 5. Erro Conditions and Protective Actions

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Hi Tsuji-san,

1. No, the error pin is not pulled up to VDDIO internally

2. The ERR pin is pulled low if any of the pairs has a violation detected

Regarding "What is the failure threshold of ERR pin?" could you expand on what is meant by this? The output voltage for the ERR pin is listed in the spec for 'OH' and 'OL' as VDDIO - 0.2V and 0.2V respectively

3. Any of the 5 sensors will trigger a global reset

3-2. ERR pin = L

4. Yes VCC3 and ground is GNDL

Regards,
Will Toth


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