Image may be NSFW.
Clik here to view.Hi Rick,
The fault pin is typically asserted under transient load conditions. It does not remain asserted (see included image). Typically, one to three faults occur in sequence.
Image may be NSFW.
Clik here to view.Hi Rick,
The fault pin is typically asserted under transient load conditions. It does not remain asserted (see included image). Typically, one to three faults occur in sequence.