The minimum amount of lag in the DRV8305 between a change on a INx pin to a change on the gate drive pin is approximately 515 ns. For most applications this is negligible.
However, if your controller firmware is not optimized to react fast enough to changes in hall states, that can introduce a significant amount of lag to the system. The reference design originally attached is a good starting point for how to properly optimize firmware on an MSP430G2553 for a sensored BLDC controller application.
However, if your controller firmware is not optimized to react fast enough to changes in hall states, that can introduce a significant amount of lag to the system. The reference design originally attached is a good starting point for how to properly optimize firmware on an MSP430G2553 for a sensored BLDC controller application.