Hello Rick,
the VM was 48V.
We didn't notice anything odd on the chip select and/or clock signals.
Digital signals are driven by a uC through isolator/buffer like ISO7231 and ISO7220 (the 5V supply is totally independent from the VM), anyway all power supply are always present (they are unrelated to the sleep condition).
I really don't think it can be a spurious clock or chip select during awakening, because this eventually could affect the very first communication (irrespective of the type): when we was checking for the problem we tried doing some reads just after resuming from sleep and they all work properly. As stated before, the issue was only on the very first WRITE access after awakening.
Currently I've switched to another project (as the workaround seem working good) but if you thing it could be usefull I'll can take some waweforms with the scope in the next few days.
the VM was 48V.
We didn't notice anything odd on the chip select and/or clock signals.
Digital signals are driven by a uC through isolator/buffer like ISO7231 and ISO7220 (the 5V supply is totally independent from the VM), anyway all power supply are always present (they are unrelated to the sleep condition).
I really don't think it can be a spurious clock or chip select during awakening, because this eventually could affect the very first communication (irrespective of the type): when we was checking for the problem we tried doing some reads just after resuming from sleep and they all work properly. As stated before, the issue was only on the very first WRITE access after awakening.
Currently I've switched to another project (as the workaround seem working good) but if you thing it could be usefull I'll can take some waweforms with the scope in the next few days.