all your questions are going to depend on the gear reduction you use and how many poles you have in your motor. good luck!
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RE: General getting-started BLDC driving/control questions
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RE: DRV8870 / IVM, IVM(sleep) at VM=16V
Asaka-san, sorry for the delay. Since Figure 3 shows a 7% change between 12V and 16V, the max IVM values should also be 7% larger.
active: 10.7mA
sleep: 10.7uA
Best regards,
RE
active: 10.7mA
sleep: 10.7uA
Best regards,
RE
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DRV8870 / IVM, IVM(sleep) at VM=16V
Hello,
Could you please let me know the IVM, IVM(sleep) value at VM=16V?
Best Regards,
Ryuji Asaka
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RE: DRV8308 Bad Commutation in SINE mode
Paul, good question. The duty cycle the DRV8308 applies during startup is not well-controlled. The SPEED register does affect it, but really just needs to be a large enough value to spin the motor up to the target speed. Lower values of SPEED should prevent overshoot, but if it's too low, target speed won't be reached, so it's simplest to just set it to 4000.
Best regards,
RE
Best regards,
RE
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DRV8308 Bad Commutation in SINE mode
The DRV8308 register setup I am using is shown below.
The mode is 120 deg commutatioin with single Hall (BASIC = 0, ENSINE=0)
This runs the motor perfectly over a wide speed range. LOCKn active after startup at any speed.
The problem comes when doing nothing more than setting ENSINE=1. The motor draws large current, the phase current is erratic. Continuously goes in/out of LOCK. Setting before start or setting on-the-fly does same. Setting MOD120=3970, does the same.
ENSINE should just change the PWM flat duty to sinusoidal duty. It should not change commutation angle (my assumption about what is happening). The switch between 180 comm single Hall and 120 comm single Hall should be seamless. I don't understand what is happening here.
A good overall block diagram of the system, filter topology, startup algorithm, would be very helpful.
I am unable to get Sine mode to operate in my drive nor in the evaluation kit.
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RE: BOOSTXL-DRV8301 output oscillation
Nicholas,
I sent Tom the design files for the DRV8301-HC-C2-Kit, as he was asking the question about the oscillation as a means to an end to designing a board using the DRV8301. I think that having the HC-C2-Kit schematic will help him design his system without the oscillation that was noticed while testing using the BOOSTXL booster pack.
Closing this thread
-Sean
I sent Tom the design files for the DRV8301-HC-C2-Kit, as he was asking the question about the oscillation as a means to an end to designing a board using the DRV8301. I think that having the HC-C2-Kit schematic will help him design his system without the oscillation that was noticed while testing using the BOOSTXL booster pack.
Closing this thread
-Sean
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BOOSTXL-DRV8301 output oscillation
Hi motor drivers team,
My customer is experiencing buck supply output oscillation above 38V input voltage. Information I have received so far:
- 140mVpp oscillation experienced with original 47uF output electrolytic capacitor
- 52mVpp oscillation experienced when changed to 47uF ceramic capacitor
- Removing C15 compensation capacitor made the oscillation worse
Below 38V input, the output is absolutely smooth. Customer is trying to achieve 50V+ at the input
Can you suggest how to eliminate this oscillation?
Thanks,
Sean
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RE: DRV8412 lowest frequency possible and corresponding bootstrap cap size?
Hi Andrew,
We will investigate and get back to you.
When running at 100Hz, what is your maximum duty cycle?
Do you need 100Hz, or can you run at ~800Hz with a 50ns low side pulse to avoid UVP as described in section 7.3.2.1 of the datasheet.
We will investigate and get back to you.
When running at 100Hz, what is your maximum duty cycle?
Do you need 100Hz, or can you run at ~800Hz with a 50ns low side pulse to avoid UVP as described in section 7.3.2.1 of the datasheet.
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DRV8412 lowest frequency possible and corresponding bootstrap cap size?
We are using DRV8412 up to 10kHz. Some applications are less than 100 Hz. At 100 Hz what should the bootstrap cap be? Is there a design equation? The 5 ohm resistor on GVDD is already know, but for such a slow application we need to know how big the bootstrap cap should be. We are too far along to switch and picked this part because we are doing both stepper and BLDC applications.
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RE: DRV3201-Q1 Maximum value of tdeg,ENon ( A-56)
Hi Ushikubo-san,
Sorry for the delay, this question is taking longer than we had expected. I will provide a status update by the end of the week.
Regards,
Will Toth
Sorry for the delay, this question is taking longer than we had expected. I will provide a status update by the end of the week.
Regards,
Will Toth
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DRV3201-Q1 Maximum value of tdeg,ENon ( A-56)
Hello,
tdeg,ENon doesn’t have maximum value.
Please give me any information of maximum value of tdeg,ENon.
Best Regards.
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RE: DRV8308 - recommended and safe values for charge pump capacitors
Hi,
We will investigate and reply soon.
We will investigate and reply soon.
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DRV8308 - recommended and safe values for charge pump capacitors
Hello!
Assuming that 0.1uF/35V is a recommended capacitor for pins CP1 and CP2 (CP flying capacitor) on DRV8308, what would be the maximum tolerable capacitance? Or in other words, would the IC remain undamaged if the capacitance is for example 0.22uF or 0.33uF?
Similarly, if the CP storage capacitance (between VM and pin VCP) is changed from recommended1uF to 2.2uF or 3.3F, would that have an adverse effect on the IC?
Many thanks in advance.
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RE: DRV8305 minimum pin configuration
Hi Asif,
PWRGD is an open drain output indicating VREG undervoltage or watchdog fault. You can chose to use this or not.
WAKE is a pin used to bring the device out of SLEEP mode. If you do not expect to use SLEEP mode you can tie this to 3.3V or direct to PVDD through resistor.
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RE: DRV8305 minimum pin configuration
Hi Asif,
Yes, you can pull the WAKE input pin high using a resistor. Doing so disables sleep mode increases the current used by the DRV8305 from <100uA typ to 4mA typ. If you are trying to reduce current when idle, it is recommended to control the WAKE pin.
PWRGD is an open drain output, which is why there is a pullup attached.
Yes, you can pull the WAKE input pin high using a resistor. Doing so disables sleep mode increases the current used by the DRV8305 from <100uA typ to 4mA typ. If you are trying to reduce current when idle, it is recommended to control the WAKE pin.
PWRGD is an open drain output, which is why there is a pullup attached.
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RE: BLDC Motor with current regulation
Hi Rick-san,
Thank you for your reply. I'm sorry for my poor information.
The voltage is from 12V to 24V.
The constant current is 0.6A.
I will ask the customer about control speed.
He wants to reduce MIPS, so he wants to use the DRV8307/08 or DRV10983.
Can they control speed and torque?
Best Regards,
Naoki Aoyama
Thank you for your reply. I'm sorry for my poor information.
The voltage is from 12V to 24V.
The constant current is 0.6A.
I will ask the customer about control speed.
He wants to reduce MIPS, so he wants to use the DRV8307/08 or DRV10983.
Can they control speed and torque?
Best Regards,
Naoki Aoyama
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RE: DRV8840 I0~I4 pin voltage level
Hi Shimizu,
4.7k should be work without issue since the device is even fine with 3.3V input H level. But smaller resistor will be better to keep stable level in noise condition.
Best regards,
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RE: DRV8302 GVDD, AVDD, PVDD all output zero voltage
Hi Mike,
Can you provide more background on the application?
What PWM frequency are you targeting?
The Phase connections are unusual.
The current limiting resistors in the gate drive may not allow the gates to turn on quickly.
Can you provide more background on the application?
What PWM frequency are you targeting?
The Phase connections are unusual.
The current limiting resistors in the gate drive may not allow the gates to turn on quickly.
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RE: DRV8305 minimum pin configuration
Thank you both Nick and Rick!!
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DRV8305 minimum pin configuration
Hello -
I am building custom hardware, and have a question regarding the DRV8305. On the BOOSTXL-DRV8305, the "PWRGD" and "WAKE" pins are broken out. On the TIDA-00643 reference design, I see that the "PWRGD" pin is pulled logic HIGH (3.3v), and not connected to the MCU. Can I do something like this with the "WAKE" pin as well, or is it recommended to have this connected to the MCU??
I definitely want to be able to set the FETs into high-impedance, so I am definitely connecting the "ENGATE" to the MCU, but based on the data sheet it doesn't seem like the "WAKE" pin is required.
Please advise. Any help is appreciated.
-asifjahmed
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