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RE: DRV8303: DRV8303 Flow Through Drive of High and Low Side FETs

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I am using 2x CSD18540Q MOSFETs. Slowing the high side slew rate from 10ns out to 50ns with a 100R series gate resistor made a significant improvement in reducing the low side ringing issue. The shoot through on high side switch off did however become a fault inducing issue. I have tried several combinations with both high and low gate currents. The unfortunate issue is that there is a need for a slow charge to prevent the low side gate ripple from high dV/dt, yet need a fast discharge to prevent shoot through. It appears the DTC control does not work as intended. I haven't otherwise been able to determine (based on the datasheet contents) the mechanism for investigating the DTC trigger condition.

2.2k resistor pull downs have no noticeable impact on either high or low side gates.
A 4.7R series bootstrap resistor wasn't found useful in solving this issue.

Using a 100R series resistor on the high side gate seems a stable approach for overcoming the low side gate ripple. The low side just can't hold itself off, even on the highest gate current setting or with resistor pull downs. For turn off, high gate current helps, but the subsequent shoot through gets worse. Having the DTC at maximum or shorting to 0R dynamically has no impact at all on the shoot through condition. Fitting a schottky diode in parallel with the high side gate resistor to discharge the gate quicker is a noticeable improvement, but still does not solve the shoot through.

Currently I can only conclude that the DTC cannot be used to prevent the observed shoot through. Perhaps with detailed information on the DTC mechanism this could be checked further. Otherwise, it appears the design needs to use a 6-PWM control signal with digital deadtime adjustment. Unfortunate, as the software for the space vector modulation output was already completed and validated.

Any feedback on the DTC would be appreciated!

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