RE: DRV8302: Guidelines on setting Vsense.

July 25, 2017, 8:39 am

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Rick,

Thanks for the buck converter link, that was helpful, lots of good info there.

Yes, we are trying to achieve 5V and we do get that on a production board.

We received a return however that is reporting current offset fault. Normally my current offset is at 2.5V, but this one is measuring 1.6V. I then noticed that my 5V is not 5V but at 8.25V. Vsense, which is at 0.8V on a normal board, is showing 1.29V. Makes sense from the resistive divider perspective but looks like the internal reference is off.

Anything external to the device that could cause this?

Any event that might cause it.

VIN (PVDD) is 12V to 20V depending on load.

The EN_BUCK is open circuit.

The EN_GATE pin is pulled low with a 1K to ground unless driven by the controlling processor to 3.3V.

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RE: DRV8302: Guidelines on setting Vsense.

July 25, 2017, 8:55 am

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Hi John,

The buck converter group has been notified and should reply next. If you do not hear back from them in a day or two, please feel free to ping me.

RE: DRV595 application circuit

July 25, 2017, 11:49 am

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Hello Simon! I have looped in Shawn on your question for a reply. Thanks, Jeff

DRV595 application circuit

November 27, 2013, 12:02 pm

≫ Next: RE: DRV8821: DRV8821 Web page says "Three-Bit Winding Current Control Allows up to Eight Current Levels" is this really on this chip?

≪ Previous: RE: DRV595 application circuit

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I would like to see an application circuit for the DRV595 TEC driver IC.

After reading the datasheet, I don't understand how it is used. The datasheet states states "The typical circuit used for this application is to have two feedback loops  one for constant current, and the second to monitor the temperature, and provide adjustments to keep a constant temperature on the laser diode. An error amplifier is used to combine the two feedback loops, along with a control signal from the system. The output of the error amplifier is then fed into the DRV595.

Fundamental question: How do you sense the current for input to the constant current loop?

-Bob McKnight

RE: DRV8821: DRV8821 Web page says "Three-Bit Winding Current Control Allows up to Eight Current Levels" is this really on this chip?

July 25, 2017, 12:00 pm

≫ Next: DRV8821: DRV8821 Web page says "Three-Bit Winding Current Control Allows up to Eight Current Levels" is this really on this chip?

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Hi John,

Thank you for pointing this out.

That sentence appears to be a copy paste error. The eight current levels available are dependent on the two bits xxUSM1 and xxUSM0. These levels depend on the indexer table and the Ichop.

DRV8821: DRV8821 Web page says "Three-Bit Winding Current Control Allows up to Eight Current Levels" is this really on this chip?

July 25, 2017, 10:47 am

≫ Next: RE: LMD18200: Bypass capacitance

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Part Number: DRV8821

I'm trying to work out a problem on the DRV8821 and just read under the features column "Three-Bit Winding Current Control Allows up to Eight Current Levels" is this wrong? I know that you control Ichop using Vref, but is there some secret input I don't see in the data sheet?

As of July 25, 2017 www.ti.com/.../DRV8821

RE: LMD18200: Bypass capacitance

July 25, 2017, 1:17 pm

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Hi Paulo,

Please note the SUPPLY BYPASSING section of the datasheet:

It is normally necessary to bypass the supply rail with a high quality capacitor(s) connected as close as possible
to the VS Power Supply (Pin 6) and GROUND (Pin 7). A 1 μF high-frequency ceramic capacitor is recommended.
Care should be taken to limit the transients on the supply pin below the Absolute Maximum Rating of the device.
When operating the chip at supply voltages above 40V a voltage suppressor (transorb) such as P6KE62A is
recommended from supply to ground. Typically the ceramic capacitor can be eliminated in the presence of the
voltage suppressor. Note that when driving high load currents a greater amount of supply bypass capacitance (in
general at least 100 μF per Amp of load current) is required to absorb the recirculating currents of the inductive
loads.

LMD18200: Bypass capacitance

July 25, 2017, 6:27 am

≫ Next: RE: DRV8412: Vreg is not up

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Part Number: LMD18200

We are developing a control board with LMD18200 motor driver for a welding equipment application [wire feeder].
The equipment as two functional operative work. In the first one the motor current in costant around 0.6 A max, while in the others the equipment work in “pulsed” mode where the motor is activated first in one direction for 300 ms, then in other direction for 200ms. That generates current pulse with peak of 10A and exponential decrease where current value get 0.6 A in around 150ms. RMS current value is around 4A.
The question concern which bypass value capacitors is/are suggested for LMD18200 Vs power supply. LMD18200 is supplied by a 42 V rail.

Thank you for your support.

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RE: DRV8412: Vreg is not up

July 25, 2017, 1:30 pm

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Hi Wee Chang,

Thank you for the information.

We are glad to hear the problem is resolved, but we will continue to investigate. If we find anything, we will let you know.

DRV8412: Vreg is not up

July 20, 2017, 2:58 am

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Part Number: DRV8412

Hi,

I have issue where the Vreg is not always up, sometime is does, sometime it doesn't. When Vreg doesn't go up to 3.3V, all logic circuit are not responding.

When it is up, it looks like:

When it doesn't, it looks like:

Anyone has any similar experience? any clues to troubleshoot?

RE: DRV8821: Mystery Overcurrent Tripping

July 25, 2017, 2:24 pm

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After lots of testing I was never able to catch a voltage that should have tripped it (1.5A into 3 ohms should be a 4.5V trip threshold) even with a 2us/division time scale (or longer or shorter), but I did manage to capture pulses up to a little over 2V which is much higher than the drive current (0.25A into 3ohms is 0.75A).  This corresponded directly to the back EMF I was investigating and I was able to capture a couple of times where it actually disabled the chip with a signal of 2 to 2.25V.  There is a possibility my wires or scope are somehow low passing what I'm measuring, but it is a 200MHz scope.

Anyway, increasing the deceleration at the point of rapid speed changes made it easy for me to observe changes in the back EMF spike and get it spread out over enough time as the disappear into the normal motor current range of 0.25A.  Since I enacted the change I have not been able to get the chip to disable so I believe I have a working solution.

To add some feedback on the chip it would be wonderful for the reset bit to be able to clear an over-current condition, a fault output would be extremely helpful to know the chip has disabled, and increasing the over-current value to at least 2.0A and decreasing the pulse sensitivity would be extremely helpful.  I do see many of these features in different motor control chips from TI so I will investigate those for future designs.

Thank you very much for the help!

Regards,
Dan

DRV8821: Mystery Overcurrent Tripping

July 7, 2017, 3:01 pm

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Part Number: DRV8821

We use multiple DRV8821 components in one of our systems and we are evaluating a new motor for use on one of the circuits.  The circuit is configured for a maximum of 0.27A by using a 3Ohm resistor (with 100nF cap across it) on the sense pin.  Our original motor worked generally fine and has had very few issues with false tripping of the over current circuit.  However, in testing of the new motor we get over current tripping within 5 to 10 seconds of operation.  I feel confident it is over current tripping because the power must be cycled to return it to operation, and the chip itself does not feel warm or measure warm with an IR thermometer.

The original motor had 7.2mH of inductance and the new motor has 11mH.  VREF input has been tested at 3.5V and 4.0V.  At 3.5V it may be lasting slightly longer before it trips.  Current probing doesn't show anything of interest, the motor traces look like I would expect and I can see no difference between them.  With the original motor we have had a couple of boards where running the motors continuously for days would cause the over current to trip, but those have been quite minor.  Having them never trip would be better, but it was at a level that could be lived-with.  However, tripping within 5-10 seconds now has me hunting for a solution.

Relevant schematic portion is below.

Are there any other things that could be tripping this?  Since it is configured for a maximum of 0.27A, which I have confirmed by scope with a current probe, I am a bit stumped as to why it would be tripping.

Thanks for your help!

Dan

RE: DRV8308: DRV8308

July 26, 2017, 5:11 am

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Hi Phil,

After several tests we have concluded that:
Neither SPEED nor LOOPGAIN are gains applied to the error signal to calculate the output. If we cancel the integral factor, by doing zero SPDGAIN, and keeping SPEED and LOOPGAIN, the motor speed in the acceleration and steady state are always the same regardless of the setpoint.
Even the constant speed may be greater than the setpoint, which makes no sense in a proportional regulator.
In our opinion, SPEED and LOOPGAIN are not gains but constants added to the output. Without integral factor they are directly the output.
Another thing, LOCKn does not signal the transition from the proportional interval to the integral interval.

We are wrong?

Thanks

DRV8308: DRV8308

July 6, 2017, 11:12 am

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Part Number: DRV8308

Dear Sirs,

We have a design with two DRV8308.

We are adjusting the parameters for differents loads and speeds in very large range. We have a doubt with the Clock Frequency Mode we are using. First it looks a single speed loop PI with some optional automatic gain and advance corrections.

More or less, we are able to choose the parameters for each case in practice, Also we try to replicate the functionality of this speed close-loop mode in a simulation software for faster results.

We have a doubt with the Clock Frequency Mode.

Page 40 of the datasheet:

SPEED parameter: In the the Clock Frequency Mode, SPEED sets the open-loop gain during spin-up before LOCKn goes Low.

What does it mean? It´s not in close-loop mode from the start? The LOOPGAIN, SPDGAIN, and the other parameters, close-loop related, have not influence during spin-up. The duty cycle of the PWM is not calculated from the start until the speed reaches CLKIN?

Thanks and best regards

Javier Vicandi

RE: LMD18200: Bypass capacitance

July 26, 2017, 5:43 am

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Hi Paolo,

At 42V and 10A for possibly tens of ms, I would recommend having the footprints for 10A x 100uF. As you evaluate your system, you may find that you can reduce the capacitance. 

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RE: DRV8821: Mystery Overcurrent Tripping

July 26, 2017, 7:27 am

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Hi Dan,

Thank you for your suggestions. We will added them to the list of improvements in future devices. The newer devices do have these abilities, but do not have the ability to control two steppers.

There is a method that could be used to create a pseudo fault indicator for these events. By adding two high impedance resistors across the outputs to create 1/2VM, and a second resistor divider from 1/2VM to lower the voltage further to mcu input levels the outputs can be monitored to determine if they are still active. A protection circuit to limit the voltage in the case of one resistor opening should be considered. One circuit per motor would be needed.

Example: Place two 100k resistors in series across the winding of one motor. Place a second divider of 12k from the middle of the two 1M resistors and 4k to GND. The center of this second divider should provide approximately 0 to 3V at VM=24V. This signal can be monitored for activity by the mcu if desired. A similar circuit can be seen in Figure 4 of www.ti.com/.../slva858.pdf

While this can indicate the outputs are disabled, it does not solve the second issue you mentioned (a reset to clear the condition).

RE: DRV8302: DRV8302 nFault issue

July 26, 2017, 7:42 am

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Hi Kaustubh,

Please see post: e2e.ti.com/.../966969  This post also applies to the DRV8302.

If this does not answer your question, please provide more details:
How long does nFAULT go low?
Does nFAULT remain low?
Can you capture the AVDD, DVDD, GVDD signals to ensure all regulator voltages are within tolerance?

DRV8302: DRV8302 nFault issue

July 26, 2017, 4:23 am

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Part Number: DRV8302

Hello all,

A professor ask,

" I’m' working on the development of a BLDC motor driver and I'm using the DRV8302 as a gate driver. I dimensioned all of the external components according to the device datasheet using the webench_design online app for the internal buck components. I'm now facing the following problem,

I noticed that when the EN_GATE pin is set to high the nFAULT pin goes low. It does it most of the time but not always. I have examined DRV8302 datasheet. It says that nFAULT goes low in case of overvoltage of GVDD, under voltage of PVDD, DVDD, GVDD, in case of external FET overload and in case of over temperature. Now external FETs aren’t overloaded because the motor is disconnected, and there is no reason for over temperature. Also nOCTW is high.
There is no supply under voltage. Concerning the internal levels of the driver, they are generated only in case EN_GATE in set high (in this case as said nFAULT goes low) and they don't seem to be out of their max and minimum range. How could I solve it? "

[View:/cfs-file/__key/communityserver-discussions-components-files/38/SmallA_5F00_Board.pdf:41:29]

Could anyone help me with this please? I have attached the schematic design and partial layout of the resulting board (just the DRV layer).

Thank you in advance.

 

RE: Motor Decay

July 26, 2017, 8:04 am

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Hi James,

Load typically does not affect the current in a stepper motor. System voltage, motor inductance and resistance, and motor speed have the biggest effect.

As the device speeds up, the current from 0 to 100% and from 0 to -100% can look more like a sine wave.

If you have not done so, please refer to www.ti.com/.../slyy066a.pdf for more details.

RE: Motor Decay

July 26, 2017, 8:07 am

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Hi James,

Sorry, I hit reply too soon. Depending on the conditions listed above, this can be typical of slow decay. That is the reason AutoTune was introduced.