My IT Dept blocks browser extensions so i can't use the Cloud based GUI DRV8353Rx (ti.com)
I need access to the Windows Executable for the DRV8353 EVM GUI. Where do I find it?
The manual slvu791b.pdf mentions Setup_DRV8353Rx-1.0.0_EVM.zip but it is no where to be found...
John
Hello team,
There is 2 description on the VGS_LVL.
Which one is true for the DRV8706H-Q1?
Thanks.
Regards,
Hirata
Hi Team,
Customer would like to know:
1. The output voltage of nfault pin is 4.7V, and the voltage of vref pin is more than 7V. Is it mormal?
2. The voltage of nfault and veref is normal, VM24V, EN is high level, PH changes level, H bridge does not make corresponding changes.
Thanks,
Annie
Hi Team,
My customer test the motor current as below picture shows, it seems there has some distortion during the motor current cross 0A. Below are three questions comes from customer:
#1 Could you possible help to share some comments on what kind of parameter configuration would has influence for the distortion? Would DRV8889A and DRV8889 has difference performance for this function？
Currently, customer see that when they change slew rate from 0x10 to 0x11, it would be better for the current drop below to 0A
Customer configuration:
Vref=2.5V, TRQ_DAC=0x0111; Slew Rate=0x10
Vref=2.5V, TRQ_DAC=0x0111; Slew Rate=0x10
#2 During the distortion happened, would there has lose step risk here?
#3 As to configuration sequence, is there has any requirement for register configuration and step pulse input? Since customer find that if they input step pulse firstly, then configure the TRQ_DAC, then the output current would not changed as what they configured, if they configure TRQ_DAC firstly, then give the step pulse input to device, then the output current would follow what they configured.
Thank you very much for your support.
Best regards
Jie
In our design the capacitor 1µF is connected to VCP-Pin 4 and th other side to PIN 2 VM instead to Pin 4 VDRAIN. THE result is the distortion with the 4 distortion pulses, which are described in
"Internal charge pump generate spikes (distortion)in the power distribution". With a rework we changed the connection from the capacitor to Pin 2 VM to the connection as defined in the data sheet to Pin 4 VDRAIN. THe result is that the four distortion pulses were eliminated, but we have now ground jumps on the plane. Currently we have not found a way how to eliminate the groud jumps. We can say that these ground jumps comming from the motor driver (charge pump).
Note in the previouse configuration where the capacitor was connected to VM pIN 2, we had a common mode choke, which had split the ground between Power GND and GND_IO (digital Ground). WE find out, that when we short POwer GND With GND_IO at the common mode shoke, the four distortions are gone.
TO understand the charge pump inside the motor driver, it is helpful to get more details about the internal realization of the motor driver.
i asked me, what happened when the capacitor at VCP -PIN is connected to VM instead to Vdrain. Is that a configuration which TI can accept ?
THANK you to all.
Norbert
Dear Team,
As per the application circuit mentioned in the datasheet of the MCF8316A, the nFAULT pin should be pulled up using 5.1kOhm resistor.
But in the Evaluation Board schematics, this resistor is not connected.
As per our requirement, we want to have a LED for fault detection. Is it mandatory to have the pull-up resistor in parallel to the LED connection?
Thanks and Regards,
Sujeesh V
Dear Team,
I tried installing the MCF8316A_GUI and encountered with the following error
& "product_fullname_with_underscores = MCF8316A_GUI"
System configuration are as follows,
Thanks and Regards,
Sujeesh V
We're seeing some unusual behavior on the DRV8434S: if the VSDO supply pin is floating and nSLEEP changes state while VM is present, VSDO will briefly *output* a roughly 4V pulse of voltage that gradually decays. In this scope capture, yellow is VSDO and green is nSLEEP.
This becomes even more of an issue if VSDO and nSLEEP are tied together (either directly or with a resistor, for example 10k) and supplied from the same voltage, since if they are disconnected from the voltage source (allowed to float) at the same time with VM present, the VSDO pulse will cause nSLEEP to go high and low again, which triggers more pulses and leads to repeating oscillations on the two pins.
A pull-down resistor does not stop the pulses unless it is about 60 ohms or stronger. Is this a known issue with the DRV8434S? Is there a suggested solution or workaround?
Hi team,
The PWMMODE of the OFF Register register uses the Bypass indexer, use xINx inputs to control outputs. The customer wants to know how to control the stepper motor with this setup? How to operate the official GUI?
Thanks,
Annie
While performing some testing on the DRV8412 and attempting to drive a single phase (A) with a 5Hz PWM signal, I noticed the below behavior (yellow signal). After the output goes HIGH, it remains HIGH for about 2.3ms before the shown downward spikes occur.
I strongly suspect that this behavior is caused by the bootstrap capacitor value and the spikes are a result of the DRV8412 BST_UVP condition.
I believe it to be the BST_UVP condition because the above capture was recorded for a DRV8412 with 1uF bootstrap capacitors, and a subsequent capture with 2uF bootstrap capacitors showed a 2x longer HIGH duration prior to the spikes (~4.7ms). Additionally, the spikes occur at ½ the frequency with 2uF capacitors (1kHz) as with 1uF capacitors (2kHz). See below for 2uF capture.
A couple of questions:
Thank you.
Hi TI Support,
I have a product using the DRV2605L chip for driving a LRA vibrator. I have a questions with respect to a seldom issue we until now have only seen in field and not been able to reproduce in our lab regardless what we have tried. Based on your design knowledge of the internals of the DRV2605L I therefore hope you will be able to help me getting the debugging of this to the next stage, so that we are sure that we will implement a correct fix...
Assumption is that the DRV2605L (during some circumstances) can get into "unknown state" as it's described in page 20 of https://www.ti.com/lit/ds/symlink/drv2605l.pdf. But as I can't provoke the problem intentionally I can't say for 100% sure, but everything we can see from the field point in this direction. Based on this my questions are now:
1) When in "unknown state", can there be any risk that the H-bridge FETs are active so that a constant DC current will flow through the attached vibrator? Or is it for sure KNOWN to ONLY affect the I2C communication thereby making chip functionality not working, but with NO additional current consumption as another unintended side effect? Or can this unintended current consumption potentially happen as well (as I currently expect)?
2) When in "unknown state", for sure the I2C doesn't work (as per datasheet and other TI E2E posts), but is the EN pin still having (some) functionality (i.e. determining if H-bridge at all is active or not?), so that any assumed DC current (as proposed in question 1) would be affected by EN pin being HIGH or LOW? Or is the EN pin entering the "control and playback engine logic at a far earlier place" so that it's usage/state will be indeterministic as well? My assumption right now (but not as sure as above) is that the EN pin state might still have some influence on the in 1) proposed current draw, but I would like you to check/confirm/deny...
3) Is there any way to for sure reproduce the problem in our lab on any random chip? Based on other TI E2E posts I guess not, as it seems that not all chips are affected. I guess problem depend on chip wafer position? Or other chip to chip tolerance factors?
4) Will a chip with "lock up possibility", always "lock up" assuming "voltage is ramped too slow" or is this as well a probability function depending on other stuff like temperature, randomness, etc.? Or put in other words: Will we have a good (better) chance of reproducing the problem if we can get any of the (sometime - seen) failing devices returned to our lab for further investigation? I know this is hard to answer, but I would anyway kindly request you "good feeling" on this as well?
5) Is it correct understood that there is no other way of solving/fixing this problem than actually ensuring ramping the supply voltage fast enough (minimum 3.6kV/s) as described in datasheet on page 20 as well, and that ONLY way to get the chip behaving well again when first "locked up" is to remove the power and following ensure it following getting powered up fast enough according to specification?
Hoping above questions are clear. Please don't hesitate reach out in case any more information is needed and I will be happy try to help out best possible I can...
Best regards and thanks in advance
Søren
Hi,
HALL + Current Control mode
don't know why once isSet_A reached 0.15, system out of control.
0:03 HALL estimator + Current Control mode start, isSet_A set to 0.09
0:05 motor start, speed_Hz = 6.8 still under speedStart_Hz (10), motorState = MOTOR_CL_RUNNING, both speedEST_Hz and speedHall_Hz were in-sync.
0.07 speed_Hz > speedStart_Hz, motorState = MOTOR_CTRL_RUN
0:22 increase isSet_A to 0.1, speed_Hz increase accordingly
0:33 increase isSet_A further to 0.12, speed_Hz increase
0:42 increase isSet_A to 0.15, speed_Hz increase all the way up to its limit ~260, idq_in_A > isRef_A (out of control ?)
1:04 reduce isSet_A to 0.12, speed_Hz didn't not decrease
1:11 reduce isSet_A further to 0.1, speed_Hz still not decrease
1:24 reduce to 0.09 ...
1:27 reduce to 0.07 ...
1:39 reduce to 0.06 ...
1:44 reduce to 0.05 ... now speed_Hz started decrease
thanks,
Tiger
e2e.ti.com/.../hall-current-isset-test.mp4
Hi,
There is a small confusion on the maximum safe voltage for using this IC. Its datasheet mentions 70 V. However, its evaluation board recommends 52.5 V only. What limits the evaluation board not to be used upto or near the maximum voltage? please. In my application, the DC bus voltage is 61 V. I want to use this IC to driver stepper motors. or please advise if that is possible. Also, please recommend a change, which may extend the operation of evaluation board to 61 V. Thank you.
Hi TI Team,
I've recently created a custom board basing on the MCT8316Z as a gate driver, I've come to an issue with the buck converter. I'm supplying the nSLEEP pin with a 5V input. I'm getting a clear 3.3V give or take a little as my AVDD output, but, my buck converter which components are scaled down to 3.3V output is giving me the full supply voltage of 26V.
Is there something wrong with my layout/component sizing that this is happening or this might be a chip issue and I should replace it with a new one?
Regards,
Patryk.
Hello!
I want to get AEC-Q100-012 Short-Circuit Reliability Test Results of below parts.
DRV8910
DRV8244
Regards,
Hello !
Customers requests critical circuits to be aging tested before shipment.
Are the following parts aging tested before shipment?
DRV8910
DRV8244
Please tell me about the contents of inspections that can be disclosed.
100% or sampling inspection
High temperature test (e.g. 125°C)
Low temperature test (e.g. -40°C)
Current value and ON time
Regards,
Hi team,
Here's an issue from the customer may need your help:
The customer is currently using a DRV8303 to drive a BLDC motor. There is an issue with current sensing. Without any motor attached to board and a motor voltage (PVDD) connected, the current sense output (SO1 and SO2) is correct.
They have checked that SN1 and SP1 as well as SN2 and SP2 are at exactly 0 V, which is correct since there is no current flowing through the shunt resistor. Reference input REF is at exactly 3.3 V. The output of the SO1 and SO2 pin is 1.65V, which is normal.
To test if the amplifier is functioning, removing the shunt resistor, which is connected to the SN1 and SP1 pins, and manually apply a voltage(0.100V) to the SN1 pin, which supposedly will be amplified, and the voltage on the SO1(output) pin will drop to 0.65V (according to the formula [1.65-(0.1*10)] as setting the gain of the C.S.A. to 10V). However, the voltage on the SO1 pin remains to be 1.65V. The output of the C.S.A is unresponsive to the input.
The schematic and circuit are as follows:
BRD: https://drive.google.com/file/d/1lv5I7GT6esK-80-wN8fSaVhWlB1ejIwC/view?usp=sharing
SCH: https://drive.google.com/file/d/1lvBKcgRM2TCG_ksn0xLjSbLgVWraZkdn/view?usp=sharing
The code is as below shows:
#include <SPI.h>
#define INHA PA8
#define INLA PA9
#define SO1 PB1
#define INHB PA10
#define INLB PB6
#define SO2 PB0
#define INHC PB7
#define INLC PB8
#define LED PC13
#define EN_GATE PB12
#define NOCTW PB14
#define NFAULT PB13
#define chipSelectPin PA4
word data;
void changeSPI3PWM()
{
digitalWrite(chipSelectPin, LOW); // manually take CSN low for SPI_1 transmission
data = SPI.transfer16(0b0001000000111000); //0 0010 00000111000
digitalWrite(chipSelectPin, HIGH);
}
void changeCurrentSense() {
digitalWrite(chipSelectPin, LOW);
data = SPI.transfer16(0b000110000000000); //0 0011 0000000000
digitalWrite(chipSelectPin, HIGH);
}
void setup() {
SPI.begin();
SPI.setBitOrder(MSBFIRST);
SPI.setDataMode(SPI_MODE1);
SPI.setClockDivider(SPI_CLOCK_DIV16);
pinMode(chipSelectPin, OUTPUT);
Serial.begin(115200);
pinMode(INHA, OUTPUT);
pinMode(INLA, INPUT);
pinMode(SO1, INPUT);
pinMode(INHB, OUTPUT);
pinMode(INLB, INPUT);
pinMode(SO2, INPUT);
pinMode(INHC, OUTPUT);
pinMode(INLC, INPUT);
pinMode(EN_GATE, OUTPUT);
pinMode(PB4, OUTPUT);
pinMode(NOCTW, INPUT);
pinMode(NFAULT, INPUT);
pinMode(LED, OUTPUT);
digitalWrite(PB4, LOW); //PB4 is the DC_CAL PIN
digitalWrite(EN_GATE, HIGH);
changeSPI3PWM();
changeCurrentSense();
}
void loop() {
digitalWrite(INHB, HIGH);
digitalWrite(INHA, HIGH);
digitalWrite(INHC, HIGH);
if (digitalRead(NFAULT) == LOW) {
Serial.println("NFault low");
}
if (digitalRead(NOCTW) == LOW) {
Serial.println("NOCTW low");
}
Serial.print(Current_Calculation(analogRead(SO1) / 4096. *3.3), 10);
Serial.print(" ");
Serial.println(Current_Calculation(analogRead(SO2) / 4096. *3.3), 10);
}
double Current_Calculation(double RawVolt) {
const double K = 2. ;
const double G = 80.;
const double VREF = 3.3;
return (VREF - (K * RawVolt)) / (G * K); //general solve
}What might be the most likely reason for this error? Could you help check this case? Thanks.
Best Regards,
Cherry
For the LRA clamp voltage, the equation(7) do not match the "Table 8. LRA Auto-Calibration Example" of "DRV2605 setup guide".
In the setup guide, the HEX value is A0, setting clamp voltage is 2.82V.
Via the equation in datasheet, when the HEX value is A0, the settling clam voltage should be 3.5136V
Hi team,
Could you please help answer 2 questions?
1. When high-side recirculation, will the ITRIP limit the motor current? I think it is no, we see a large current beyond ITRIP caused by BEMF.
2. Will IPROPI voltage > 5.75V when output is shorted and the current is near the abs. 32A? I think it is a current mirror circuit and at this time it will be equal to VDD.
Best,
Zeming
Hi,
I'm using a DRV8300DI gate driver for a motor control application and there seems to be significant ringing at larger currents and the rise time is extremly fast.
The layout is done according best practice for motor control, reducing inductance as much as possible etc., so there should not be too much issues there. I think the gate driver resistor is way too low (22Ohm),
but from my experience 22Ohm is for a 48VDC application already pretty high, right? I want to reach get around 100ns rise time, but at the moment I have more like 15ns and thight might be the reason for ringing.
The MOSFET is the following with a capacitance Qgd of 9.1nC: https://www.infineon.com/dgdl/Infineon-ISC030N10NM6-DataSheet-v02_00-EN.pdf?fileId=8ac78c8c7bb971ed017bb9a9887300a4
So, how should I choose my Rgate? Tau = R*Q/U = 22Ohm * 9.1nF / 12VDC = 16.7ns (12V Gate Drive Voltage), so is my time constant way to short right? But it seems from the EVAL Board with the DRV8300, there are way lower gate resistors for a MOSFET with nearly the same gate charge.
Schematics:
Top:
GND:
VCC:
BOT:
Ringing @ 10A (Blue is current with 100mV/A) (SHA):
Ringing @ 20A (SHA):
Ringing @ 30A (current probe saturates at 20A) (SHA):
GHA before the gate resistor @ 20A:
GHA after the gate resistor @ 20A:
