DRV8311: Correct de-coupling capacitance required if the internal LDO is not utilised

Tool/software:

Hi,

I am planning to use the DRV8311P in a very small product. The PCB is roughly 10mm x 20mm. 

We have 120mA load @ 3V3 so we are using a small DC/DC (the TLVM365R15) instead of the internal LDO to provide system 3V3. This will also help keep the heat dissipation down.

In the datasheet SLVSFN2B Revision B, on pages 5 & 6 it advises the de-coupling capacitor requirements for VIN_AVDD and AVDD.
N.B I plan to use 10-20uF on the VM pin

As our board needs to be so tiny I want to use the minimum de-coupling necessary. However, as we are not loading the internal LDO externally I'd
like to know what the minimum de-coupling is recommended for VIN_AVDD and AVDD.

As per the images below the datasheet states the LDO is also used for digital logic and there is also another LDO used for the Pre-Driver (presumably not 3V3?)

Based on the spec for the maximum external load when 2.5 < VIN_AVDD < 3.6 being 10mA I assume the internal load is less than this which allows me to use 1uF on AVDD.
Nowhere does it state what the internal 3V3 digital load actually is...

Now for VIN_AVDD all it states is 10uF and that seems(guessing) to be irrespective if you are externally loading the LDO or not. Our VIN_AVDD could be connected to the output
of our 3V3 DC/DC OR it could be connected to VM. If connected to VM it will generate a little more heat but again this depends on that internal digital load current which is unknown.
If I connect it to the DC/DC 3V3 then it will not regulate and it looks like the LDO would put out ~3V. This may have impacts on the digital logic it supplies so may not be a good idea.
On top of this of course is what de-coupling cap is necessary for VIN_AVDD.

Hope someone can help, this is a complex one.

Thanks, Shane